“SYCL 2020 is a significant step towards bringing C++ heterogeneous programming to all. It supports diverse applications from HPC supercomputing centers, to powerful machine learning frameworks, to creative and professional applications on embedded and desktop PCs. These real-world insights will enable the SYCL Working Group to achieve our long-term dream of converging with ISO to bring parallel heterogeneous programming to modern C++ in an open standard collaborated by many companies across many varieties of processors.”
SYCL uses generic programming with templates and generic lambda functions to enable higher-level application software to be cleanly coded with optimized acceleration of kernel code across the extensive range of various acceleration APIs, such as OpenCL. Developers program at a higher level than the native acceleration API, but always have access to lower-level code through seamless integration with the native acceleration API through the interoperability mode, C/C++ libraries, and frameworks such as OpenCV™ or OpenMP™
SYCL implementations are available from an increasing number of vendors, including adding support for diverse acceleration API back-ends in addition to OpenCL.
SYCL 2020 Provisional is a preview of the latest on-coming version of SYCL. It is based on experience with the previous SYCL versions, the latest ISO C++ standard, various parallel frameworks, languages and runtime user groups, implementers or committees. This is not the final version but is provided to get further feedback from the users and implementers to make the final version better.
cl::sycl::namespace or having kernel names optional.
SYCL 1.2.1 revision 7 is now the latest release as of April 27, 2020, is based on C++11 and OpenCL 1.2, and is a major update representing 5 years of work by Khronos members. The new specification incorporates significant experience gained from 5 separate implementations and feedback from developers of machine learning frameworks such as TensorFlow, which now supports SYCL alongside the original CUDA accelerator back-end.
SYCL 1.2.1 builds on the features of C++11, with additional support for C++14 and C++17, enabling ISO C++17 Parallel STL programs to be accelerated on OpenCL devices. To support this effort, Khronos is backing an open-source project to support Parallel STL on top of SYCL, running on OpenCL devices. This project is hosted on GitHub. So, while SYCL brings the power of single-source modern C++ to the OpenCL and SPIR world, it also prepares the convergence with other standards such as Khronos' Vulkan, OpenVX and NNEF and ISO C++ (SG1, SG6, SG12, SG14, SG19).
These SYCL 1.2 specification and conformance tests were released on May 11, 2015 and includes the following features:
“Our users will benefit from features in the provisional SYCL 2020 specification. New features, such as support for unified memory and reductions, are important capabilities for programming high-performance-computing hardware. In addition, support for C++17 will allow our users to write better C++ code, with both language features (such as deduction guides) and library features (such as std::optional).”
“At Cineca, based on our experience, we confirm the value that SYCL is bringing to the development of high performance computing in a hybrid environment. In fact, through SYCL, it is possible to build a common and portable environment for the development of computing-intensive applications to be executed on HPC architectures configured with floating point accelerators, which allows industries and scientific communities to use the common availability of development tools, libraries of algorithms, accumulated experience. Cineca is already running the distributed Celerity runtime on top of several SYCL implementations on the new Marconi100 cluster, ranked no. 9 in the Top500 (June 2020), providing users with a unified API for both about 4000 NVIDIA Volta V100 GPUs and IBM Power9 host processors. SYCL 2020 is a big step towards a much leaner API that unlocks all the potential provided by modern C++ standards for accelerated data-parallel kernels, making the development of large-scale scientific software easier and more sustainable, either for industrial oriented domain applications for industries, either for scientific domain oriented applications.”
“We have seen a huge increase in SYCL developer adoption since the release of the last SYCL specification. Developers are demanding a model that enables them to write software that offers both performance and programmability across a wide range of vendor processors. SYCL provides this. The new features in SYCL 2020 bring some crucial enhancements that will benefit developers, with less code to write and the ability to target non-OpenCL devices.””
“Imagination recognizes the benefit of SYCL across multiple markets, enabling a straightforward and performant way to exploit the compute performance of our IP and is why our software stacks have been designed to improve SYCL performance. The ability to quickly port workloads from other proprietary APIs is a huge benefit, easing the transition from development on desktop to deployment on embedded systems. SYCL 2020 is a positive step forward for this API, enabling higher levels of performance, which will benefit developers and platform creators.”
“The SYCL 2020 Provisional Specification marks a significant milestone helping improve time-to-performance in programming heterogeneous computing systems through more productive and familiar C++ programming constructs. Through active collaboration with The Khronos Group, the new specification includes significant features pioneered in oneAPI’s Data Parallel C++, such as unified shared memory, group algorithms, and sub-groups that were upstreamed to SYCL 2020. Moving forward, Intel’s oneAPI toolkits, which include the SYCL-based Intel ® oneAPI DPC++ Compiler, will deliver productivity and performance for open, cross-architecture programming.”
“NNSITEXE supports the SYCL 2020 technology, which is gaining attention in embedded applications. We are considering adopting this technology in our next generation of IP platforms.”
“Xilinx is excited about the progress achieved with SYCL 2020. This single-source C++ framework unifies host and device code for various kinds of accelerators in the same C++ program. With host-fallback device execution, developers can emulate device code on a CPU, exploring hardware-software co-design for adaptable computing devices. SYCL is now extensible via customizable back-ends, enabling device plug-ins for FPGAs and ACAPs.”