To write a 32-bit marker value into a buffer as a pipelined operation, call:
// Provided by VK_KHR_synchronization2 with VK_AMD_buffer_marker void vkCmdWriteBufferMarker2AMD( VkCommandBuffer commandBuffer, VkPipelineStageFlags2KHR stage, VkBuffer dstBuffer, VkDeviceSize dstOffset, uint32_t marker);
commandBufferis the command buffer into which the command will be recorded.
stagespecifies the pipeline stage whose completion triggers the marker write.
dstBufferis the buffer where the marker will be written.
dstOffsetis the byte offset into the buffer where the marker will be written.
markeris the 32-bit value of the marker.
The command will write the 32-bit marker value into the buffer only after
all preceding commands have finished executing up to at least the specified
This includes the completion of other preceding
vkCmdWriteBufferMarker2AMD commands so long as their specified
pipeline stages occur either at the same time or earlier than this command’s
While consecutive buffer marker writes with the same
parameter implicitly complete in submission order, memory and execution
dependencies between buffer marker writes and other operations must still
be explicitly ordered using synchronization commands.
The access scope for buffer marker writes falls under the
VK_ACCESS_TRANSFER_WRITE_BIT, and the pipeline stages for identifying
the synchronization scope must include both
Implementations may only support a limited number of pipelined marker write operations in flight at a given time. Thus an excessive number of marker write operations may degrade command execution performance.
For more information, see the Vulkan Specification
This page is extracted from the Vulkan Specification. Fixes and changes should be made to the Specification, not directly.