IWOCL & SYCLcon is the premier workshop of leading academic and industrial experts to present, discuss and learn about applying OpenCL and SYCL addressing issues faced in High Performance Computing across a wide range of application domains. This is an excellent opportunity to contribute and participate in this workshop through a paper, talk, special session / tutorial, or poster. This workshop will include invited presentations from academia and industry, and a panel discussion of leading experts in the field.

Deadline for submissions is January 15th, so don’t delay. Submit your proposed content today.

Codeplay recognized that there are few resources for safety practitioners and programmers looking at developing applications with SYCL that are required to meet functional safety requirements. This three part series of blog posts will give readers an overview of what they need to know about using SYCL in a safety-critical environment. The information is most relevant to safety practitioners working with SYCL, but equally will help to educate developers working on low-level drivers for DSPs and other processors.

• Part 1 - An Introduction
  
• Part 2 - SYCL for Automotive AI and ADAS applications
  
• Part 3 - SYCL ADAS Applications Topology Explained
  

Codeplay Software Ltd, pioneers in enabling acceleration technologies, announced today that software developers working on HPC and AI for embedded systems will be able to take advantage of industry defined open standards from The Khronos Group on RISC-V architectures, thanks to Japan’s New Energy and Industrial Technology Development Organisation (“NEDO”) project in which NSITEXE and Kyoto Microcomputer Co., Ltd. (“KMC”) are participating.

NSITEXE and KMC have ordered an implementation of LLVM for RISC-V Vector Extension Processor (“RVV”), and also Codeplay’s ComputeAorta™ and ComputeCpp™, efficient and high performance implementations of OpenCL and SYCL open standards. In the NEDO project, as a research, NSITEXE develops OpenCL and SYCL compilers from LLVM to utilize RVV, and KMC implements vector syntax to utilize RVV efficiently based on LLVM and Clang. These research developments will contribute to RISC-V community to support open-standard technologies.

This white paper gives a high-level overview of vehicle development, followed by a deep dive in the different software development processes, languages and tools that are required for efficient development of the next generation of intelligent vehicles. This paper especially explores SYCL. Three main challenges are covered: The software development processes, the shift towards CD / CI, and the programming of future - heterogeneous systems using open standards (e.g. SYCL). To this end an overview of the automotive landscape is given, where functional safety standards are now the norm and where open standards for software are becoming the solution for the automotive industry, achieving the demands of ADAS developers and overcoming software development challenges.

Codeplay’s Charles Macfarlane, CBO, and Illya Rudkin, Safety-Critical Software Development Lead, have contributed to this white paper as part of the Autosens conference proceedings. The paper emphasizes the need for the automotive industry to embrace open standards including SYCL in order to be able to meet the needs of the next generation of vehicles. Learn more and download the paper.

Celerity is an open source project which focuses on providing a way of scaling applications to a cluster of accelerators without having to be an expert in distributed memory programming. In fact, the Celerity API does not make it apparent that a program is running on many nodes at all: There is no notion of MPI ranks or process IDs, and partitioning of work and data is taken care of transparently behind the scenes. Celerity is built on top of SYCL: The API makes it the perfect starting point that hits a sweet spot between cost and power as well as ease of use. From that base, we set out to find the minimal set of extensions required to bring the SYCL API to distributed memory clusters - thus making it relatively easy to migrate an existing SYCL application to Celerity.

In the latest episode of CppCast Codeplay VP of Research & Development Michael Wong talks about the provisional specification of SYCL 2020. The specification has now been released and Michael joined Rob and Jason to give an introduction to what SYCL is, and why the latest revision brings some great new features, as well as less verbose, simpler code.

They cover a range of other topics, from the challenges of moving MISRA, a standard used for safety critical applications such as vehicles, to use more modern C++ features like templates and dynamic memory, through to his involvement in aligning the ISO C++ standard with SYCL to support parallel programming.

Listen to the Podcast

Nicole Huesman is joined by Ronan Keryell, principal software engineer at Xilinx, and Jeff Hammond, principal engineer at Intel, to hear their explanation on why open collaboration — modeled through open source and open standards — is key to solving some of today’s biggest challenges in research and industry, revealing some of the misconceptions, or least understood aspects, along the way. Then they explore the value of open languages and programming models, diving into ISO C++, Khronos Group SYCL, the amazing SYCL community, and what excites them most about the SYCL 2020 Provisional Specification.

A new blog from Codeplay continues on from Ray-tracing in a Weekend with SYCL: Basic sphere tracing, which tackled rendering. In this second post, Codeplay shows how to use SYCL to improve the performance of the previous code further using some interesting techniques.

SYCL has been selected as the programming model for Argonne National Lab’s Aurora supercomputer, the first exascale supercomputer in the world. SYCL’s selection is the group’s belief that it is an open standard that can be relied on long into the future. Learn more about SYCL and why SYCL and ISO C++ were chosen.

Intel has released oneAPI DPC++ Compiler 2020-05 as their latest snapshot for the current state of their LLVM-based Data Parallel C++ Compiler. With this release comes various SYCL front-end and driver improvements and the OpenCL ahead-of-time compilation tool is now included in their sycl-toolchain target, and much more.

The IDEAS Productivity project, in partnership with the DOE Computing Facilities of the ALCF, OLCF, and NERSC and the DOE Exascale Computing Project (ECP) has resumed a webinar series on Best Practices for HPC Software Developers, which began in 2016. Next webinar is June 10th, and will be covering SYCL best practices.

C++ Ray-Tracing in a Weekend by Peter Shirley is a great resource to start learning about ray-tracers and how to implement one, and at the same time providing all the source code in a GitHub repository. The main goal of this blog post is not to teach the concepts of ray-tracing, Peter does a great job of that, but provide a walk-through tutorial on how to accelerate practical applications and algorithms using SYCL. Read on to learn more.

This year IWOCL & SYCLcon 2020 had a record number of high quality submissions in all categories; research papers, technical presentations, tutorials and posters. These video presentations from the IWOCL & SYCLcon 2020 program of papers, tech. presentations and posters are now online.