Enterprises should find it easier to tap the benefits of FPGAs now that Dell EMC and Fujitsu are putting Intel Arria 10 GX Programmable Acceleration Cards into off-the-shelf servers for the data center. The Arria 10 GX cards offers the Intel FPGA SDK for OpenCL to help ease programming hurdles. Xilinx has also been building up the software stack for its own FPGA product families, and recently announced what it calls a new category of programmable chip – the Adaptive Compute Acceleration Platform (ACAP). It says that developers can work with ACAPS using standard tools like C/C++, OpenCL, and Python.
This blog will give a quick run through of the SYCL profiling features that have been developed in the latest version of LPGPU2 CodeXL. LPGPU2 CodeXL is not yet available to the public but it was made available to the LPGPU2 consortium during February 2018. It is the aim to make a version of CodeXL with SYCL profiling features available when the project is completed.
VeriSilicon today announced significant milestones have been achieved for its versatile and highly scalable neural network inference engine family VIP8000. The fully programmable VIP8000 processors reach the performance and memory efficiency of dedicated fixed-function logic with the customizability and future proofing of full programmability in OpenCL, OpenVX, and a wide range of NN frameworks including NNEF. “The biggest thing to happen in the computer industry since the PC is AI and machine learning, it will truly revolutionize, empower, and improve our lives. It can be done in giant machines from IBM and Google, and in tiny chips made with VeriSilicon’s neural network processors,” said Dr. Jon Peddie, president Jon Peddie Research. “By 2020 we will wonder how we ever lived without our AI assistants,” he added.
Khronos member Renesas Electronics has outlined their plans for ADAS and self-driving cars. Renesas is working with Codeplay Software Ltd., experts in high-performance compilers and software optimization for multi-core processing. The collaboration allows programs already written in CUDA for Nvidia’s SoC to be brought to R-Car SoCs, using Codeplay’s OpenCL open standard-based software framework. The framework, first made available on R-Car H3 as a proof of concept, is now coming to the R-Car V3M and other R-Car SoCs of Renesas’ autonomous platform for both ADAS and automated driving.
Codeplay has written up a detailed run through of how they how they ensure C++ fundamental types are translated correctly from SYCL code through to OpenCL, retaining their correct size and signedness.
If you're an application developer, this will help you learn a little about how SYCL works under the hood. If you're looking to implement SYCL, this will help you find a way to get the compiler to do your lifting for you.
Imagination Technologies announces the PowerVR CLDNN SDK for developing neural network applications on PowerVR GPUs. The neural network SDK makes it easy for developers to create Convolutional Neural Networks (CNNs) using PowerVR hardware. CLDNN sits on top of OpenCL making use of OpenCL constructs so it can be used alongside other custom OpenCL code. It uses standard OpenCL memory, so it can be used alongside standard OpenGL ES contexts. Learn more about CLDNN and download the SDK today.
The Khronos recently announced SYCL 1.2.1. The SYCL 1.2.1 specification has improved on the existing 1.2 standard by introducing new features which allow for better integration with existing machine learning and OpenCL-based frameworks such as TensorFlow as well as various improvements based on user feedback. This is an exciting piece of news for Codeplay is it enables them to work towards full compliance of SYCL 1.2.1 for ComputeCpp, and their v0.5 release which is now available to download. Read more about how Codeplay is using SYCL 1.2.1 with ComputeCpp v.0.5.0.
Codeplay has a very good write-up today on machine alternatives that don't use Neural Networks. The included code, SYCL-ML was developed as a proof of concept to show what a machine learning application using heterogeneous computing can look like and has been published as an open source project. The project was developed using SYCL and ComputeCpp, which is an implementation of SYCL developed by Codeplay.
Portable Computing Language (pocl) 1.0 has been released. One of the bigger highlights of this release is that most of the OpenCL 1.2 standard conformance tests pass with the CPU backend. There are some caveats though to this listed in the documentation. Pocl is a portable open source (MIT-licensed) implementation of the OpenCL standard (1.2 with some 2.0 features supported).
Neil Trevett, Khronos Group President and Radhakrishna Giduthuri, Software Architecture and Compute Performance Acceleration at AMD, spoke at two Khronos related events this past week. Neils presented was an update on the Khronos Standards for Vision and Machine Learning which covered Khronos Standards OpenVX, NNEF, OpenCL, SYCL and Vulkan. Radhakrishna presented Standards for Neural Networks Acceleration and Deployment covered Khronos Standards OpenVX and NNEF. The slides from both presentations are now online.
The Khronos Group announces the ratification and public release of the finalized SYCL 1.2.1 specification. SYCL for OpenCL enables code for heterogeneous processors to be written in a “single-source” style using completely standard modern C++. The multi-vendor SYCL 1.2.1 standard is available royalty-free for industry use, and the full specification together with details about the SYCL open-sourced conformance test suite and Adopters Program are online.
The Khronos™ Group announces the ratification and public release of the finalized SYCL 1.2.1 specification. SYCL for OpenCL enables code for heterogeneous processors to be written in a “single-source” style using completely standard modern C++. The multi-vendor SYCL 1.2.1 standard is available royalty-free for industry use, and the full specification together with details about the SYCL open-sourced conformance test suite and Adopters Program can be found at www.khronos.org/sycl.
Codeplay has set out its intention to lead the development of guidelines to ensure that standards like OpenCL and SYCL meet the strict safety requirements for a range of industries by leading the Khronos SCAP. Illya Rudkin, Principal Software Engineer at Codeplay, is now leading the Khronos Safety Critical Advisory Panel and continues the work done by Erik Noreke to establish the panel. Erik was a long time member of Khronos and well respected for his leadership in numerous working groups. On his appointment Illya said "My role is to continue the work by Erik and grow the participation of both Khronos members and external safety experts within the group. I also hope to enable the group to bring current and new open standards into the safety domain. The demand for safety critical software is growing and we have to ensure adopters of our standards can implement complex systems, often involving multiple layers, as efficiently possible with minimal concerns to safety cases." Learn more about the goals that Illya has for The Safety Critical Advisory Panel. Please contact Khronos if you would like more information about becoming a member, or joining and advisory panel.