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Neural Networks Need Some Translation - Invitation to Khronos NNEF Advisory Panel

• Tags: NNEF Neural Networks Need Some Translation - Invitation to Khronos NNEF Advisory Panel

Khronos is readying a standard interchange format to map training frameworks to inference engines. The Neural Network Exchange Format (NNEF) is an open, scalable transfer format that allows engineers to move trained networks from any framework that supports the cross-vendor format into any inference engine that can read it. It’s a sort of PDF for neural networks. Khronos is extending an invitation to data scientists and engineers to take part in an NNEF advisory panel, especially people working on non-standard and novel network inferencing architectures. Participation does not require a Khronos membership and will give interested companies and individuals an opportunity to contribute and provide feedback to this important work.   Read More

Embedded Vision Summit Khronos OpenVX Workshop for Neural Network Acceleration

• Tags: API OpenVX NNEF

Don’t miss this year’s OpenVX Workshop at Embedded Vision Summit. Khronos will present a day-long hands-on workshop all about OpenVX cross-platform neural network acceleration API for embedded vision applications. We’ve developed a new curriculum so even if you attended in past years, this is a do-not-miss, jam-packed tutorial with new information on computer vision algorithms for feature tracking and neural networks mapped to the graph API. We’ll be doing a hands-on practice session that gives participants a chance to solve real computer vision problems using OpenVX with the folks who created the API. We’ll also be talking about the OpenVX roadmap and what’s to come.    Read More

FotoNation & VeriSilicon Collaborate on advanced computer vision and computational imaging platform

• Tags: OpenCL OpenVX NNEF

FotoNation Limited and VeriSilicon Holdings Co., Ltd have entered into an agreement to jointly develop a next generation image processing platform that offers best-in-class programmability, power, performance and area for computer vision (CV), computational imaging (CI) and deep learning. The market-ready IP platform, named IPU 2.0, will be available for customer license and design in the first quarter of 2017. IPU 2.0 offers a unified programing environment and pre-integrated imaging features for a wide range of applications across surveillance, automotive, mobile, IoT and more. IPU 2.0 will use open initiatives such as OpenVX and OpenCL.   Read More

Khronos Launches Dual Neural Network Standard Initiatives

• Tags: API OpenVX NNEF

The Khronos Group today announced the creation of two standardization initiatives to address the growing industry interest in the deployment and acceleration of neural network technology. Firstly, Khronos has formed a new working group to create an API independent standard file format for exchanging deep learning data between training systems and inference engines. Work on generating requirements and detailed design proposals for the Neural Network Exchange Format (NNEF™) is already underway, and companies interested in participating are welcome to join Khronos for a voice and a vote in the development process. Secondly, the OpenVX™ working group has released an extension to enable Convolutional Neural Network topologies to be represented as OpenVX graphs and mixed with traditional vision functions. Read the press release about both of these Neural Network Standard Initiatives.   Read More

FPGA with OpenCL Solution Released to Deep Learning

• Tags: OpenCL NNEF

The deep learning speech recognition acceleration solution leverages an Altera Arria 10 FPGA, iFLYTEK’s deep neural network (DNN) recognition algorithms and Inspur’s FPGA-based DNN parallel design, migration and optimization with OpenCL. The solution has a hardware platform in CPU+Arria 10 FPGA heterogeneous architecture and software in a high-level programming model in OpenCL to enable migration from CPU to FPGAs.   Read More

Inspur and Altera Launch Speech Recognition FPGA Solution with OpenCL

• Tags: OpenCL NNEF

Inspur Group and the FPGA chipmaker Altera today launched a speech recognition acceleration solution based on Altera's Arria 10 FPGAs and DNN algorithm from iFLYTEK, an intelligent speech technology provider in China, at SC15 conference in Austin, Texas. The deep learning speech recognition acceleration solution leverages an Altera Arria 10 FPGA, iFLYTEK's deep neural network (DNN) recognition algorithms and Inspur's FPGA-based DNN parallel design, migration and optimization with OpenCL.   Read More

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