C tagged news

Altera will demo live video streaming using OpenCL, and real-time video processing such as Sobel edge-detection and image manipulation, all coded in OpenCL software and running on Altera FPGAs. In addition, this demo uses an Altera’s Nios II soft processor, and enables the power of OpenCL in embedded applications by removing the need for external processor or host server machine.

AMD CodeXL is a new unified developer tool suite that enables developers to harness the benefits of CPUs, GPUs and APUs. It includes powerful GPU debugging, comprehensive GPU and CPU profiling, and static OpenCL kernel analysis capabilities, enhancing accessibility for software developers to enter the era of heterogeneous computing. AMD CodeXL is available for free, both as a Visual Studio extension and a standalone user interface application for Windows and Linux.

AMD CodeXL increases developer productivity by helping them identify programming errors and performance issues in their application quickly and easily. Now developers can debug, profile and analyze their applications with a full system-wide view on AMD APU, GPU and CPUs.

AMD CodeXL user group (requires registration) allows users to interact with the CodeXL team, provide feedback, get support and participate in the beta surveys.

Register today for a webinar series on how to use the Intel SDK for OpenCL Applications to best utilize the CPU and Intel HD Graphics of 3rd Gen Intel Core processors for developing OpenCL applications:

December 2011 saw the kick-off of an ambitious research project called “CARP: Correct and Efficient Accelerator Programming”, which aims to boost the programmability of accelerator hardware, such as graphics processing units (GPUs), by innovating in programming language design and implementation, as well as formal verification techniques. Funded by the European Commission’s Seventh Framework Programme (FP7), the consortium, which consists of eight partners--including Khronos members ARM, Imperial College London and Rightware--seeks to provide a unified flow for developing correct and efficient accelerator software, thus increasing reliability and energy efficiency of computing systems.