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Researchers showcase work on bringing OpenCL programming framework to RISC-V chips

A paper presented at the Fifth Workshop on Computer Architecture Research with RISC-V (CARRV 2021), concentrates wholly on off-the-shelf RISC-V chips – introducing support for the Open Computing Language (OpenCL) heterogeneous programming framework commonly used to spread scientific workloads across CPUs, GPUs, and other accelerators. The OpenCL implementation, which resulted from the team’s research, required no changes to the processor designs themselves, and is compatible with a range of parts – from high-performance multi-core processors to low-profile embedded implementations.