The COLLADA work group is pleased to announce the official COLLADA 1.4 Schema reference card. Described as a labour of love, this reference card is a must have for any COLLADA developer. Download the reference card now.
A few advantages to using OpenCL on the CPU are that results are on the CPU for further processing, CPU-code can be mixed with OpenCL and specific algorithms can be processed faster because there is no PCIe-overhead. Streamcomputing has a closer look at at why you may find OpenCL on the CPU useful for your own work.
AMD to hand out free copies of their newly-published book "OpenCL programming on AMD CPU/GPUs" at the Khronos DevU on December 8th, and the December 9th Conference and Lunch. Errata: We had previously stated the book would be handed out at SIGGRAPH ASIA. In fact the book will be handed out at the Khronos DevU at Tsinghau University On December 8-9 2010.
CMSoft presents an easy-to-use powerful tool to compute the Discrete Fourier Transform using the Fast Fourier Transform algorithm with OpenCL, both single-precision and double-precision. Source code containing examples is available.
DMP is proud to announce two all new OpenGL ES programming training courses. OpenGL ES programming training I and II will run January 13-14 and January 20-21 2010. Complete details are available online for the Training I and Training II courses in english, and in Japanese.
ARM has announced the ARM® Mali™-300 graphics processing unit (GPU), supporting OpenGL® ES 2.0 and bringing High Definition (HD) graphics performance to entry-level and mid-range consumer devices.The Mali-300 GPU offers support for the Khronos industry standards OpenVG™ 1.1, and OpenGL® ES 1.1/2.0, in common with other ARM Mali GPUs.
AMD has posted a great Google Map showing Universities world-wide that offer OpenCL coursework.
Digital Media Professionals Inc. (DMP hereafter), a world-class leader in 2D/3D graphics solutions, headquartered in Tokyo Japan, today announced that DMP has become a member of the Xilinx, Inc. Xilinx Alliance Program members make up a worldwide ecosystem of qualified companies that have a proven track record in delivering products and services built for Xilinx programmable logic technologies. DMP provide the competitive FPGA (Field-Programmable Gate Array) solutions in aspects of system cost benefits and lowering design risks with its IP products tightly cooperating with Xilinx’s platforms.
This international meeting of experts provides a single forum for representatives of all standards bodies and the contributors to AR standards development processes to meet and discuss their activities and progress, and to advance new specifications more rapidly than is possible without face-to-face interactions. This meeting will be based on a mixture of submitted papers, invited talks and open format, group discussions. In order to inform discussions and to select speakers, participants are encouraged, but not required, to submit papers.