Heterogeneous-Compute Interface for Portability (HIP) is a runtime API and a conversion tool to help make CUDA programs more portable. It was originally contributed by AMD to the open source community with the intention to ease the effort of making CUDA applications also work on AMD’s ROCm platform.
While AMD and NVIDIA share the vast majority of the discrete GPU market, it is useful to make this “CUDA portability enhancement route” available to an even wider set of platforms. Since the Khronos OpenCL standard remains the most widely adopted cross-platform heterogeneous programming API/middleware, it is interesting to study whether HIP could be ported on top of it, expanding its scope potentially to all OpenCL supported devices. We in Customized Parallel Computing group, Tampere University, Finland, are happy to announce that to have worked on such a tool, known as HIPCL, for some time and it’s now published and available in Github.
The first release of HIPCL is a proof-of-concept, but is already useful for end-users. It can run most of the CUDA examples in the HIP repository and the list of supported CUDA applications will grow steadily as we add new features.
Hardware accelerators are power efficient implementations of challenging algorithms in heterogeneous computing platforms which are used to make key tasks in applications such as video codecs or machine vision pipelines faster, more power efficient, and less chip area consuming. Fixed function hardware accelerators are the latest class of devices Portable Computing Language (<a href=“http://portablecl.org”>POCL</a>) adds to its diverse palette of supported device types in the same OpenCL context.
The Khronos OpenCL working group recently created a new Tooling Subgroup with the aim of improving the tools ecosystem for this widely-used open standard for heterogeneous computation—in particular, boosting the development of tooling components that can be shared by multiple vendors. Subgroup members have been meeting regularly to coordinate the overall direction for OpenCL tools, with an emphasis on strengthening the development of tools in open source, particularly by encouraging collaboration between the OpenCL and LLVM communities.
Fifth-year student Adam Kelly focused on finding the most efficient way possible to simulate quantum computing. Adam’s project QCGPU is a high performance, hardware accelerated quantum computer simulator written with Python and OpenCL. News coverage and short interview with Adam are online, as well as the research paper. Congratulations Adam!
Interested in heterogeneous programming for CPUs, GPUs and FPGAs in #OpenCL? Then submit a paper, technical presentation, poster, workshop or tutorial at the annual International Workshop on OpenCL. Deadline Jan 27th
The Khronos Group OpenCL API is a SIMD programming model which maps well to the GPU but mostly bypass the fixed graphics-specific logic. The latest Radeon GPU Profiler 1.4 (RGP) now has the ability to profile OpenCL workloads in RGP. Most of the major RGP features that you’re used to using for profiling graphics workloads generated by Vulkan and DirectX 12 are there when profiling OpenCL applications, including the workload and barrier overviews.
Alibaba’s datacenter uses Xilinx FPGAs to accelerate billions of transactions for shoppers and Microsoft, in a recent announcement, said it would deploy Xilinx in its datacenter as well. This is good news for OpenCL, as Xilinx FPGA acceleration includes support for high-level programming languages and tools, including C, C++, and OpenCL.
Intel’s open-source programming function computer vision library OpenCV has released the first stable version in its 4.0 line. Release highlights list the dnn module now includes experimental Vulkan backend, and the popular Kinect Fusion algorithm has been implemented and optimized for CPU and GPU using OpenCL.
The Khronos Group has been thinking about ways that we can provide the community with a new space to chat, ask questions and learn from one another. With this in mind we have created a Slack that is open to all developers interested in or currently developing with Khronos Standards.
There are channels for each active standard and some more casual channels where you can hang out, share your work, and discuss more general topics. We encourage everyone to take part in the “Ask Anything” channel either to ask questions or help others. Although representatives of Khronos Member’s may be in a channel, non-public and/or internal only information about standards or a specific members technology will not be shared in this Slack. The Slack will be moderated and the standard Khronos Code of Conduct applies.
Nallatech and BittWare have announced their FPGA products supporting OpenCL-based tool flows for Xilinx and Intel will be marketed under the BittWare brand, part of Molex. Customers will be able to program applications using traditional HDL or higher abstraction C, C++ and OpenCL-based tool flows. Read the full press release. Nallatech also announced it will deliver its family of OpenCL-compatible accelerator cards featuring Altera Stratix V FPGAs to the High Performance Computing (HPC) market. More on this here.