Inspur Group and the FPGA chipmaker Altera today launched a speech recognition acceleration solution based on Altera's Arria® 10 FPGAs and DNN algorithm from iFLYTEK, an intelligent speech technology provider in China, at SC15 conference in Austin, Texas. The deep learning speech recognition acceleration solution leverages an Altera Arria 10 FPGA, iFLYTEK's deep neural network (DNN) recognition algorithms and Inspur's FPGA-based DNN parallel design, migration and optimization with OpenCL.
Jon Masters, a chief ARM architect at Red Hat has talked to FPGA makers about starting an initiative to define a programming interface for FPGA accelerators, probably based on OpenCL. Such an interface should include standard drivers that support PCI Express virtualization and be available for download on system boot up. IBM and Xilinx announced a multi-year strategic collaboration to jointly develop FPGA accelerators for OpenPower systems that target data centers and network function virtualization for carriers. They are collaborating on a cloud-based service for FPGA acceleration and will work on enabling programming FPGAs in C, C++ and OpenCL
For all the folks at SC15, if you are wondering where to find OpenCL on the show floor, StreamComputing has a great starter list, and don't forget about our own event page, which lists all the OpenCL related events happening at SC15.
The Khronos Group today announced the ratification and public release of the OpenCL 2.1 and SPIR-V 1.0 specifications for heterogeneous parallel computation. Consumption of the new SPIR-V cross-API intermediate language is guaranteed in the core OpenCL 2.1 specification. Khronos has released open source utilities and extensions to enable use of SPIR-V in OpenCL 1.2 and 2.0, as well as the upcoming Vulkan graphics API, ensuring widespread availability of its powerful runtime capabilities for developers of parallel computation languages and frameworks. The OpenCL C++ kernel language released in the OpenCL 2.1 provisional specification is being finalized and will be released imminently, also using SPIR-V for run-time execution. The OpenCL 2.1 specification is available for immediate download and SPIR-V 1.0 is available online as well.
Altera Corporation will be demonstrating FPGA acceleration using its leading-edge FPGAs and SoCs at Supercomputing 2015 (Booth 462), being held November 15 to 20 at the Austin Convention Center, Austin, Texas. Altera will demonstrate how the Altera software development kit (SDK) for OpenCL, combined with its portfolio of FPGAs and SoCs, can help designers achieve high-performance, power-efficient system acceleration. Altera's Michael Strickland, director in the Computer and Storage business, will also appear on a panel: SC15: Reconfigurable Supercomputing on Tuesday, November 17, from 5:30-7:00 p.m., in room 16AB.
Video's from the LLVM Developers' meeting in San Jose earlier in November are now line.
Qualcomm officially unveiled its latest mobile chip, the Snapdragon 820. According to Engadget the new Snapdragon is equipped with an Adreno 530 GPU which is around 40 percent faster than the 810's graphics. The Snapdragon 820 supports both OpenGL ES up to 3.1 and OpenCL 2.0.
Khronos will be on the west side of the SC15 hall in booth #285. Technical experts will be available to answer your questions and there will be OpenCL 2.1 and SYCL reference guides to give away. The Khronos BOF "Flocking Together: Experience the Diverse OpenCL Ecosystem" starts off with an overview of the OpenCL 2.1 C++ kernel language, the SYCL 2.1 abstraction layer, and SPIR. Following the presentation, attendees are invited to bring their code and their toughest questions. Attendees will have the opportunity to experiment with implementations and tools from multiple vendors across several platforms. The BoF session is geared for those experienced with OpenCL, it will also provide an opportunity for newcomers to ask questions both basic and technical of our experts from the OpenCL working group as well as those from various participating vendors. Be sure to visit the Khronos DevU tutorial "Portable programs for heterogeneous computing: a hands-on introduction" on Monday November 16th. Details on all of these events and much more are available on the official Khronos event page.
Altera is demonstrating how its field programmable gate arrays (FPGAs) can enable system acceleration in trading and regulatory environments at the FIA Futures & Options Expo taking place November 3-5, 2015, at the Chicago Hilton (Green Hall, Booth #107). This industry event focuses on the technology requirements and critical issues associated with the financial derivatives market. Demonstrations at the Altera booth include include an OpenCL flow on an Arria 10 FPGA using the Altera SDK for OpenCL design tool running a Mandelbrot algorithm, video downscaling, and other applications.
Now in its fourth year, the International Workshop on OpenCL will be held in Vienna, Austria, at the C3 Convention Center on April 19-21. April 19th is reserved for an Advanced Hands On OpenCL tutorial with April 20th – 21st consisting of a mix of keynotes, academic papers, technical presentations, tutorials and poster sessions. We are inviting high-quality submissions in four categories: Full Academic Papers; Technical Presentations; Tutorials; Posters.