Two OpenCL resources to help get your through the long weekend: OCL-MLA as the name implies: a mid-level set of abstractions to make OpenCL development easier by providing a set of compile-time configurable logical devices that are mapped to actual node-level device resources; SKA is a static kernel analyzer which combines a static, linear pipeline simulator (similar to the IBM spu_timing tool) with architectural heuristics to model in-order instruction issue and pipeline behavior.
Altera Corporation announced the release of its Quartus II software version 12.1 design suite for CPLD, FPGA, SoC FPGA and HardCopy ASIC designs. Quartus II bolsters its support for high-level design flows with the inclusion of an SDK for OpenCL, and enhancements to both its Qsys system integration tool and DSP Builder model based design environment.
At SC12, AMD not only got the #1 award for the powerful and energy efficient supercomputer (SANAM) powered primarily by GPUs, AMD also announced an expansion of its software ecosystem by launching a series of tools that will enable HPC developers to take advantage of GPU compute with programming methodologies that integrate OpenCL.
Intel is extending OpenCL support to Intel Xeon Phi coprocessors. Developers can apply today to participate in the upcoming new Beta program for the Intel SDK for OpenCL Applications XE 2013. This SDK will provide development environment for OpenCL 1.2 applications across both Intel Xeon processors and Intel Xeon Phi coprocessor for Linux OSs. Apply online.
The OpenCL ICD extension (cl_khr_icd) allows multiple implementations of OpenCL to co-exist on the same system. The OpenCL ICD Loader Library allows applications to choose a platform from the list of installed platforms and dispatches OpenCL API calls to the underlying implementation. Source code for the ICD loader library is available in the Khronos registry. Consult LICENSE.txt in the tarball for full terms and conditions.
Altera Corporation announced the FPGA industry’s first Software Development Kit (SDK) for OpenCL which combines the massively parallel architecture of an FPGA with the OpenCL parallel programming model. The SDK allows system developers and programmers familiar with C to quickly and easily develop high-performance, power-efficient FPGA-based applications in a high-level language. The Altera SDK for OpenCL enables FPGAs to work in concert with the host processor to accelerate parallel computation, at a fraction of the power compared to hardware alternatives. Altera will demonstrate the performance and productivity benefits of OpenCL for FPGAs at SuperComputing 2012 in booth #430.
This webinar offers an in-depth tutorial including a unique code walkthrough on how to use the hardware acceleration capabilities of the IntelÂ® Media SDK and the Intel SDK for OpenCL Applications to help you get even more performance out of video applications. Sign up now and join the webinar on Thursday November 15 at 9am pacific time.
As part of the eResearch Australasia Conference 2012, there was a Khronos Chapter meeting in Sydney Australia on October 29th 2012. The eResearch Australasia Conference is ongoing until November 2nd 2012, and registration is still open. Keep an eye on our Chapter meetings page for future Khronos chapter meetings.
Kickstarter project Parallella is well on its way to reaching the goal of building a supercomputer for everyone. The plans are to ship a chip based on Epiphany multicore chips, and ship with free open source Epiphany development tools that include C compiler, multicore debugger, Eclipse IDE, OpenCL SDK/compiler, and run time libraries.