News Archives

LunarG announced that the company is splitting into two teams to better address the needs of Vulkan, the new graphics API from Khronos. The Desktop group will continue as LunarG, sponsored by Valve, and the team members from the Mobile group will move over to Google to work on Android. LunarG will continue to work closely with Khronos to forge the new Vulkan ecosystem.

An Ada 2012 library that implements the enumerations for the SPIR-V intermediate language. This library can be used to build tools that manipulate SPIR-V in Ada 2012. This library is still being tested and comments, suggestions and bug finding are very welcome on Github.

The Wireless Innovation Forum announced the release and public availability of three new reports and the best paper from the recent WInnComm-Europe 2015. The International Coordinating Committee on International SCA Standard’s (CC SCA) “Business Models for New Entrants in the SDR Tactical Radio Market,” and the Spectrum Sharing Committee’s (SSC) “SSC WG4 Certification Process” and “Interim SAS to CBSD Protocol Technical Report-A” were approved for public release by Forum members recently. The paper “Using OPENCL to increase SCA application portability,” by Steve Bernier, François Levesque and Martin Phisel (NordiaSoft, Canada) and David Hagood (Aeroflex, USA) was presented at the recent WInnComm-Europe 2015 and awarded best paper on 8 October.

Inspur Group and the FPGA chipmaker Altera today launched a speech recognition acceleration solution based on Altera's Arria 10 FPGAs and DNN algorithm from iFLYTEK, an intelligent speech technology provider in China, at SC15 conference in Austin, Texas. The deep learning speech recognition acceleration solution leverages an Altera Arria 10 FPGA, iFLYTEK's deep neural network (DNN) recognition algorithms and Inspur's FPGA-based DNN parallel design, migration and optimization with OpenCL.

Jon Masters, a chief ARM architect at Red Hat has talked to FPGA makers about starting an initiative to define a programming interface for FPGA accelerators, probably based on OpenCL. Such an interface should include standard drivers that support PCI Express virtualization and be available for download on system boot up. IBM and Xilinx announced a multi-year strategic collaboration to jointly develop FPGA accelerators for OpenPower systems that target data centers and network function virtualization for carriers. They are collaborating on a cloud-based service for FPGA acceleration and will work on enabling programming FPGAs in C, C++ and OpenCL

The Khronos Group today announced the ratification and public release of the OpenCL 2.1 and SPIR-V 1.0 specifications for heterogeneous parallel computation. Consumption of the new SPIR-V cross-API intermediate language is guaranteed in the core OpenCL 2.1 specification. Khronos has released open source utilities and extensions to enable use of SPIR-V in OpenCL 1.2 and 2.0, as well as the upcoming Vulkan graphics API, ensuring widespread availability of its powerful runtime capabilities for developers of parallel computation languages and frameworks. The OpenCL C++ kernel language released in the OpenCL 2.1 provisional specification is being finalized and will be released imminently, also using SPIR-V for run-time execution. The OpenCL 2.1 specification is available for immediate download and SPIR-V 1.0 is available online as well.

Altera Corporation will be demonstrating FPGA acceleration using its leading-edge FPGAs and SoCs at Supercomputing 2015 (Booth 462), being held November 15 to 20 at the Austin Convention Center, Austin, Texas. Altera will demonstrate how the Altera software development kit (SDK) for OpenCL, combined with its portfolio of FPGAs and SoCs, can help designers achieve high-performance, power-efficient system acceleration. Altera's Michael Strickland, director in the Computer and Storage business, will also appear on a panel: SC15: Reconfigurable Supercomputing on Tuesday, November 17, from 5:30-7:00 p.m., in room 16AB.

The HPC Advisory Council and the Swiss National Supercomputing Centre (CSCS), will host the 7th HPC Advisory Council Switzerland Conference 2016 in the Lugano Convention Centre, Lugano, Switzerland, from March 21st to 23rd, 2016. The conference will deliver comprehensive education for topics such as the progress of Exascale, high-speed networks, high-performance and parallel I/O communication libraries (MPI, SHMEM, PGAS), GPU computing (CUDA, OpenCL), Big Data, HPC Cloud, OpenStack, storage and server advancements, new topologies, and hands-on training (clustering, network, troubleshooting, tuning, optimizations).