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Webinar: Introducing HCMP - A Heterogeneous Computing Middleware Platform
November 8, 2017

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Heterogeneous computing has provided adequate performance and power efficiency for many applications.

As heterogeneity increases, the gap between the application layer and the hardware layer increased as well. This gap makes it challenging for software developers to effectively utilize the available computing resources. To reduce this gap, we introduce a heterogeneous computing middleware platform (HCMP), which provides middleware that significantly reduces the complexity of developing industrial-strength heterogeneous computing software. Complex tasks such as multi-device memory management, device I/O, kernel scheduling, and dependency management are handled by the platform so that users can focus on writing their applications instead of adhering to complicated specifications.

What you will learn

  • The Challenges with Computing Today
  • Heterogeneous systems
    • CPUs are used for general purpose tasks such as running an OS
    • Accelerators are used for compute intensive tasks
    • Challenges and opportunities
  • Next-generation systems being deployed or contemplated, and how to access them?
  • Heterogeneous Computing Middleware Platform
    • OpenCL programming model
    • HCMP software stack
    • Live demo of the HCMP on the HPP
  • Q&A


AJ Guillon, Yetiware

AJ Guillon is the chair of the Khronos OpenCL Safety Critical (SC) TSG and founder of YetiWare. He is focused on novel models of parallel programming and platforms that enable performance portability in distributed systems containing compute accelerators. AJ contributed to OpenCL 2.1, 2.2, and the new OpenCL C++ kernel language. He is also a masters swimmer and water polo player.

Yassine Hariri, PhD, CMC Microsystems

Dr. Yassine Hariri is a senior platform design engineer at CMC Microsystems. His experience includes several areas related to the development of methodologies for implementing multi-processor platforms to FPGA targets, with a focus on board-level HW/SW implementation, integration, verification, software stack development and validation including Linux drivers and runtime targeting many-core embedded systems, design and mapping tools for heterogeneous mixed HW/SW platforms, and parallel programming models for cloud-based reconfigurable heterogeneous systems.


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