SYCL is the royalty-free, cross-platform abstraction layer that enables code for heterogeneous processors to be written using standard ISO C++. The SYCL 2020 specification was launched in February 2021 and is being used by a growing number of developers and researchers to solve real-world problems across a diverse range of domains including HPC, automotive, and machine learning.
SYCL developers now have access to an increasing number of implementations, with vendors adding support for a diverse range of acceleration API back-ends in addition to OpenCL. In this webinar we aim to provide the HPC development community will have an opportunity to engage with the SYCL working group and implementors, to provide feedback and have your questions answered.
The webinar will start with the SYCL working Group chair sharing the latest updates on the API and eco-system. Our keynote presenter with then give a developers perspective on using SYCL across multiple applications and platforms. This will be followed by detailed updates from a wide range of implementors, before the floor is opened up for attendees to ask questions during our concluding "Ask the Experts" session.
The webinar will be technical in nature and is aimed at both existing SYCL users and HPC developers looking to hear about the very latest updates on the SYCL standard and it's supporting eco-system.
Date: Tuesday December 7th
Start Time: 16:00 CET | 10:00 EST | 07:00 PST
Duration: Approx 2 hours
Host: Tom Deakin, University of Bristol, Khronos SYCL Advisory Panel Chair and SYCL Outreach Officer
SYCL Fast Forward: An Update from the Khronos Working Group
Michael Wong, Codeplay and Khronos SYCL Working Group Chair
View abstractKhronos SYCL 2020, modern ISO C++ for all devices.
Keynote: A Developers Perspective on Using SYCL Across Multiple Applications and Platforms
Prof. Garth Wells, University of Cambridge
View abstractGarth Wells is the Hibbitt Professor of Solid Mechanics at University of Cambridge, Deputy Head of Department (Research) and Fellow of Jesus College. Before joining University of Cambridge in 2007, he was an Associate Professor at Delft University of Technology (TU Delft) in the Netherlands. Prior to joining the faculty at TU Delft, he was a postdoctoral scholar at Stanford University. He completed his PhD at TU Delft and undergraduate degree at The University of Western Australia.
ComputeCPP: SYCL 2020 with Address Space Inference
Peter Zuzek, Codeplay
View abstractComputeCpp is the first SYCL 1.2.1 conformant implementation and continues to evolve. This talk will present the current status of the SYCL 2020 implementation in ComputeCpp, including a brand new device compiler that performs address space inference and also enables newer C++ features.
Hiroyuki Takizawa, Tohoku University
View abstractAbstract to follow.
James Brodman, Intel
View abstractAbstract to follow.
Ronan Keryell, Xilinx
View abstracttriSYCL is an experimental open-source SYCL implementation mainly used by Xilinx to target FPGA and CGRA with C++20.
Aksel Alpay, University of Heidelberg
View abstracthipSYCL is a flexible SYCL implementation that is advancing rapidly. In this talk, we will discuss the current state of hipSYCL regarding feature and hardware support, different ways in which it can be utilized, and we will also outline future directions and developments that users can expect to be available soon.
Ask the Experts - An Open Q&A Session
Moderated by: Tom Deakin
Our panel of SYCL experts will be available to answer questions put to them by attendees using the live Zoom Webinar Q&A feature. Don’t hold back. This is your opportunity to ask your questions to the Khronos SYCL Working Group members and other industry experts.