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FPL 2016

Field Programmable Logic 2016 Conference
August 29-September 2, 2016
SwissTech Convention Centre, Lausanne, Switzerland

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The International Conference on Field-Programmable Logic and Applications (FPL) was the first and remains the largest conference covering the rapidly growing area of field-programmable logic and reconfigurable computing. During the past 25 years, many of the advances in reconfigurable system architectures, applications, embedded processors, design automation methods and tools were first published in the proceedings of the FPL conference series. The conference objective is to bring together researchers and practitioners from both academia and industry and from around the world.

OpenCL Related Events

Relational Query Processing on OpenCL-based FPGAs
Tuesday 30th
4:00 PM
View Session
Room: 1ABCZeke Wang1, Johns Paul1, Hui Yan Cheah1, Bingsheng He1, Wei Zhang2
1Nanyang Technological University, SG
2Hong Kong University of Science and Technology, HK
Accelerating Particle Identification for High-speed Data-filtering Using OpenCL on FPGAs and Other Architectures
Wednesday 31st
Room: Auditorium B Srikanth Sridharan, Paolo Durante, Christian Faerber, Niko Neufeld
Tutorial TF1: Embedded Systems and OpenCL on the Cyclone V SoC
Friday 2nd
More Information
Room: 2BC The integration of a CPU and FPGA into an SoC allows the development of exciting applications that benefit from the strengths of each half. In this tutorial we will look at designing such applications using the Cyclone V SoC device. We will begin by examining the Cyclone V SoC device architecture, and writing baremetal code. We will then learn how to use a Linux environment to develop and run software programs that communicate with circuits placed inside the FPGA. Starting from the basics of running Linux on the Cyclone V SoC board, we will work our way up to designing a hardware-accelerated Linux application that offloads computation to a custom circuit placed in the FPGA. The tutorial will conclude with an introduction to the Altera OpenCL SDK, which provides a high-level design methodology for creating hardware-accelerated applications that use Altera FPGAs.

Participating Companies

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